Floating point (FP) add low instructions functional unit: United States Patent 9996319
An example processor includes a register and an ADD low functional unit. The register stores first, second, and third floating point (FP) values. The ADD low functional unit receives a request to perform an ADD low operation and, responsive to the request: adds the first FP value with the second FP value to obtain a first sum value; rounds the first sum value to generate an ADD value; adds the first FP value with the second FP value to obtain a second sum value; subtracts the ADD value from the second sum value to generate a difference value; normalizes the difference value to obtain a normalized difference value; rounds the normalized difference value to generate an ADD low value; and sends the ADD low value to an application.
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yazar | Cristina S. Anderson |
---|---|
Tarafından yayınlandı | 30 Kasım 2020 |
15 x 0,3 x 22 cm BrownTrout Publisher 1 Ocak 2016 28 Şubat 2018 Kolektif Collectif 15 x 0,4 x 22 cm 1 Haziran 2018 Flower Love Press Dazzle Book Press U.S. Department of the Interior 15 x 0,7 x 22 cm 15 x 0,5 x 22 cm 15 x 0,6 x 22 cm 30 Kasım 2020 1 Ocak 2018 21,6 x 0,6 x 27,9 cm 30 Eylül 2020
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Sürüm ayrıntıları
yazar | Cristina S. Anderson |
---|---|
isbn 13 | 979-8572979053 |
Yayımcı | Independently published |
DE OLDUĞU GİBİ | B08P5LBV4F |
Tarafından yayınlandı Floating point (FP) add low instructions functional unit: United States Patent 9996319 | 30 Kasım 2020 |
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